The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 18, 2020

Filed:

Nov. 18, 2015
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Mayue Xie, Phoenix, AZ (US);

Simranjit S. Khalsa, Chandler, AZ (US);

Hemachandar Tanukonda Devarajulu, Chandler, AZ (US);

Deepak Goyal, Phoenix, AZ (US);

Zhiguo Qian, Chandler, AZ (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01R 31/11 (2006.01); G01R 31/28 (2006.01); G01R 31/311 (2006.01);
U.S. Cl.
CPC ...
G01R 31/11 (2013.01); G01R 31/2853 (2013.01); G01R 31/2896 (2013.01); G01R 31/311 (2013.01);
Abstract

An apparatus comprises a signal generator circuit, a test probe, a signal sensor circuit, and a defect detection circuit. The signal generator circuit is configured to generate an impulse test signal having an impulse waveform and adjust a bandwidth of the impulse test signal. The test probe is electrically coupled to the signal generator circuit and configured to apply the impulse test signal to a device under test (DUT). The signal sensor circuit is configured to sense a conducted test signal produced by applying the impulse test signal to the DUT with the test probe. The defect detection circuit is configured to generate an indication of a defect in the DUT using the conducted test signal.


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