The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 11, 2020

Filed:

Mar. 21, 2018
Applicants:

Semiconductor Manufacturing International (Shanghai) Corporation, Shanghai, CN;

Semiconductor Manufacturing International (Beijing) Corporation, Beijing, CN;

Inventors:

Sheng Fen Chiu, Shanghai, CN;

Heng Cao, Shanghai, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/24 (2006.01); H01L 29/06 (2006.01); H01L 21/265 (2006.01); H01L 45/00 (2006.01); H01L 21/762 (2006.01);
U.S. Cl.
CPC ...
H01L 27/2409 (2013.01); H01L 21/265 (2013.01); H01L 21/76224 (2013.01); H01L 27/2463 (2013.01); H01L 29/0649 (2013.01); H01L 45/1233 (2013.01); H01L 45/16 (2013.01);
Abstract

A memory cell includes a substrate including a first diode region, a second diode region, a third diode region, and a fourth diode region, a first well region formed in the first diode region and the second diode region, a second well region formed in the third diode region and the fourth diode region, a doped conductive region formed on the first well region and the second well region, and a deep trench isolation structure formed in the substrate to electrically isolate different portions of each of the first well region, the second well region, and the doped conductive region formed over different diode regions. The second well region and the first well region have different doping types. The memory cell includes a resistance random access memory device formed over the substrate and electrically connected to the doped conductive region in the second diode region and the third diode region.


Find Patent Forward Citations

Chiu, Sheng. (2020). Memory cells and memory array structures including rram, and fabrication methods thereof (U.S. Patent No. 10741610). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/10741610

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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