The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 11, 2020

Filed:

Nov. 17, 2017
Applicant:

Infineon Technologies Ag, Neubiberg, DE;

Inventors:

Cher Hau Danny Koh, Malacca, MY;

Norliza Morban, Melaka, MY;

Yong Chern Poh, Malacca, MY;

Khay Chwan Saw, Melaka, MY;

Si Hao Vincent Yeo, Melaka, MY;

Assignee:

Infineon Technologies AG, Neubiberg, DE;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/48 (2006.01); H01L 23/31 (2006.01); H01L 23/482 (2006.01); H01L 21/768 (2006.01); H01L 23/528 (2006.01); H01L 25/00 (2006.01); H01L 23/00 (2006.01); H01L 23/495 (2006.01);
U.S. Cl.
CPC ...
H01L 23/3107 (2013.01); H01L 21/76874 (2013.01); H01L 23/3121 (2013.01); H01L 23/482 (2013.01); H01L 23/49537 (2013.01); H01L 23/49575 (2013.01); H01L 23/528 (2013.01); H01L 23/564 (2013.01); H01L 25/50 (2013.01); H01L 2224/05553 (2013.01); H01L 2224/05554 (2013.01); H01L 2224/48091 (2013.01); H01L 2224/48247 (2013.01); H01L 2924/181 (2013.01);
Abstract

A first packaged semiconductor device is provided. The first packaged semiconductor device includes a first semiconductor die having a first terminal, a first electrically conductive lead that is electrically connected to the first terminal, and a first electrically insulating mold compound that encapsulates the first semiconductor die and exposes an end portion of the first lead at an outer surface of the first mold compound. A conductive track is formed in the outer surface of the first mold compound. Forming the conductive track includes activating a portion of the outer surface of the first mold compound for an electroless plating process, and performing the electroless plating process so as to form an electrically conductive material only within the activated portion of the outer surface of the first mold compound.


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