The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 11, 2020

Filed:

Mar. 26, 2019
Applicant:

Avery Design Systems, Inc., Tewksbury, MA (US);

Inventors:

Kai-Hui Chang, North Andover, MA (US);

Christopher S. Browy, Boston, MA (US);

Assignee:

Avery Design Systems, Inc., Tewksbury, MA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 30/3312 (2020.01); G06F 30/30 (2020.01);
U.S. Cl.
CPC ...
G06F 30/3312 (2020.01); G06F 30/30 (2020.01);
Abstract

A computer executable system and method analyzes a circuit design to extract a small set of signals for value collection using an emulator system. The collected signals are for specific purpose checkers such as assertions or interactive testbenches that are hard to emulate. A synthesizable monitor block is generated and added to the emulation environment to collect the signal value changes during emulation. The collected values are then used in localized logic simulation to perform the tasks that the original checkers intent to accomplish. This system leverages fast emulation speed and flexible logic simulation capabilities to perform the intended checker tasks much faster than using logic simulation alone.


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