The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 11, 2020

Filed:

Mar. 27, 2018
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Lakshminarayana Pappu, Folsom, CA (US);

Robert Milstrey, Folsom, CA (US);

Amit Kumar Srivastava, Folsom, CA (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/00 (2006.01); G06F 1/3234 (2019.01); G06F 13/16 (2006.01); G06F 13/42 (2006.01); G06F 13/40 (2006.01); G06F 1/3206 (2019.01); G06F 1/3287 (2019.01);
U.S. Cl.
CPC ...
G06F 1/3234 (2013.01); G06F 1/3206 (2013.01); G06F 1/3287 (2013.01); G06F 13/1673 (2013.01); G06F 13/4068 (2013.01); G06F 13/42 (2013.01); G06F 2213/0064 (2013.01);
Abstract

In one embodiment, an apparatus includes: at least one processing circuit; at least one array associated with the at least one processing circuit; a power controller to manage power consumption of the apparatus; and a fabric bridge coupled to the power controller. The fabric bridge and power controller may be configured to implement a handshaking protocol to enable the fabric bridge to receive data from the at least one array via a sideband communication path and send the data to a system memory coupled to the apparatus via a primary communication path, prior to entry of the apparatus into a first low power state. Other embodiments are described and claimed.


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