The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 04, 2020
Filed:
Aug. 03, 2018
Samsung Electronics Co., Ltd., Suwon-si, Gyeonggi-Do, KR;
Young-Ju Kim, Hwaseong-si, KR;
Dong-Seok Kang, Suwon-si, KR;
Hye Jung Kwon, Seoul, KR;
Byungchul Kim, Suwon-si, KR;
Seungjun Bae, Hwaseong-si, KR;
SAMSUNG ELECTRONICS CO., LTD., Suwon-si, Gyeonggi-Do, KR;
Abstract
A memory system includes a logic circuit and a phase locked loop (PLL) circuit. The logic circuit determines a first frequency of a first clock using a first signal and generates a second signal for adjusting the first frequency of the first clock. The PLL circuit receives a second clock, and generates the first clock having the first frequency determined by the logic circuit, using the second clock and the second signal. When a second frequency of the second clock varies, the logic circuit determines the first frequency of the first clock such that the first frequency of the first clock generated by the PLL circuit is uniform, and operates based on the first clock having the first frequency adjusted by the second signal.