The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 04, 2020

Filed:

Jan. 16, 2018
Applicant:

Cadence Design Systems, Inc., San Jose, CA (US);

Inventors:

Gary Matsunami, Cupertino, CA (US);

Karun Sharma, Fremont, CA (US);

Sandipan Ghosh, San Jose, CA (US);

Yinnie Lee, Campbell, CA (US);

Assignee:

Cadence Design Systems, Inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 30/398 (2020.01); G06F 30/394 (2020.01); G06F 111/04 (2020.01); G06F 111/20 (2020.01);
U.S. Cl.
CPC ...
G06F 30/398 (2020.01); G06F 30/394 (2020.01); G06F 2111/04 (2020.01); G06F 2111/20 (2020.01);
Abstract

Embodiments according to the present disclosure relate to physically implementing an integrated circuit design while conforming to the requirements of complex color based track systems, and using information about instances that have been included in the design. In particular, the present embodiments allow for the automatic creation of WSPs by examining heights and placement orientations of instances, along with the width, spacing, and colors of instance pins and blockages. In these and other embodiments, techniques are provided for filling gaps between generated tracks, as well as for generating tracks to account for the possibility of flipped or mirrored instances.


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