The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 04, 2020

Filed:

Sep. 30, 2017
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Jose Niell, Franklin, MA (US);

Brad Burres, Waltham, MA (US);

Erik McShane, Phoenix, AZ (US);

Naru Dames Sundar, Los Gatos, CA (US);

Alain Gravel, Thousand Oaks, CA (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 15/16 (2006.01); G06F 3/06 (2006.01); G06F 16/174 (2019.01); G06F 21/57 (2013.01); G06F 21/73 (2013.01); G06F 8/65 (2018.01); H04L 12/24 (2006.01); H04L 29/08 (2006.01); G06F 11/30 (2006.01); G06F 9/50 (2006.01); H03M 7/30 (2006.01); H03M 7/40 (2006.01); H04L 12/26 (2006.01); H04L 12/813 (2013.01); H04L 12/851 (2013.01); G06F 11/07 (2006.01); G06F 11/34 (2006.01); G06F 7/06 (2006.01); G06T 9/00 (2006.01); H03M 7/42 (2006.01); H04L 12/28 (2006.01); H04L 12/46 (2006.01); H04L 29/12 (2006.01); G06F 13/16 (2006.01); G06F 21/62 (2013.01); G06F 21/76 (2013.01); H03K 19/173 (2006.01); H04L 9/08 (2006.01); H04L 12/933 (2013.01); G06F 9/38 (2018.01); G06F 9/48 (2006.01); G06F 12/02 (2006.01); G06F 12/06 (2006.01); G06T 1/20 (2006.01); G06T 1/60 (2006.01); G06F 9/54 (2006.01); G06F 8/656 (2018.01); G06F 8/658 (2018.01); G06F 8/654 (2018.01); G06F 9/4401 (2018.01); H01R 13/453 (2006.01); H01R 13/631 (2006.01); H05K 7/14 (2006.01); H04L 12/911 (2013.01); G06F 11/14 (2006.01); H04L 29/06 (2006.01); G06F 15/80 (2006.01);
U.S. Cl.
CPC ...
G06F 3/0641 (2013.01); G06F 3/0604 (2013.01); G06F 3/065 (2013.01); G06F 3/067 (2013.01); G06F 3/0608 (2013.01); G06F 3/0611 (2013.01); G06F 3/0613 (2013.01); G06F 3/0617 (2013.01); G06F 3/0647 (2013.01); G06F 3/0653 (2013.01); G06F 7/06 (2013.01); G06F 8/65 (2013.01); G06F 8/654 (2018.02); G06F 8/656 (2018.02); G06F 8/658 (2018.02); G06F 9/3851 (2013.01); G06F 9/3891 (2013.01); G06F 9/4401 (2013.01); G06F 9/4881 (2013.01); G06F 9/505 (2013.01); G06F 9/5005 (2013.01); G06F 9/5038 (2013.01); G06F 9/544 (2013.01); G06F 11/079 (2013.01); G06F 11/0709 (2013.01); G06F 11/0751 (2013.01); G06F 11/3006 (2013.01); G06F 11/3034 (2013.01); G06F 11/3055 (2013.01); G06F 11/3079 (2013.01); G06F 11/3409 (2013.01); G06F 12/0284 (2013.01); G06F 12/0692 (2013.01); G06F 13/1652 (2013.01); G06F 16/1744 (2019.01); G06F 21/57 (2013.01); G06F 21/6218 (2013.01); G06F 21/73 (2013.01); G06F 21/76 (2013.01); G06T 1/20 (2013.01); G06T 1/60 (2013.01); G06T 9/005 (2013.01); H01R 13/4538 (2013.01); H01R 13/631 (2013.01); H03K 19/1731 (2013.01); H03M 7/3084 (2013.01); H03M 7/40 (2013.01); H03M 7/42 (2013.01); H03M 7/60 (2013.01); H03M 7/6011 (2013.01); H03M 7/6017 (2013.01); H03M 7/6029 (2013.01); H04L 9/0822 (2013.01); H04L 12/2881 (2013.01); H04L 12/4633 (2013.01); H04L 41/044 (2013.01); H04L 41/0816 (2013.01); H04L 41/0853 (2013.01); H04L 41/12 (2013.01); H04L 43/04 (2013.01); H04L 43/06 (2013.01); H04L 43/08 (2013.01); H04L 43/0894 (2013.01); H04L 47/20 (2013.01); H04L 47/2441 (2013.01); H04L 49/104 (2013.01); H04L 61/2007 (2013.01); H04L 67/10 (2013.01); H04L 67/1014 (2013.01); H04L 67/327 (2013.01); H04L 67/36 (2013.01); H05K 7/1452 (2013.01); H05K 7/1487 (2013.01); G06F 11/1453 (2013.01); G06F 12/023 (2013.01); G06F 15/80 (2013.01); G06F 2212/401 (2013.01); G06F 2212/402 (2013.01); G06F 2221/2107 (2013.01); H04L 41/046 (2013.01); H04L 41/0896 (2013.01); H04L 41/142 (2013.01); H04L 47/78 (2013.01); H04L 63/1425 (2013.01);
Abstract

Technologies for processing network packets by a network interface controller (NIC) of a computing device include a network interface, a packet processor, and a controller device of the NIC, each communicatively coupled to a memory fabric of the NIC. The packet processor is configured to receive an event message from the memory fabric and transmit a message to the controller device, wherein the message indicates the network packet has been received and includes the memory fabric location pointer. The controller device is configured to fetch at least a portion of the received network packet from the memory fabric, write an inbound descriptor usable by one or more on-die cores of the NIC to perform an operation on the fetched portion, and restructure the network packet as a function of an outbound descriptor written by the on-die cores subsequent to performing the operation. Other embodiments are described herein.


Find Patent Forward Citations

Loading…