The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 28, 2020
Filed:
Nov. 27, 2018
Elpis Technologies Inc., Ottawa, CA;
Robert L. Bruce, White Plains, NY (US);
Cyril Cabral, Jr., Mahopac, NY (US);
Gregory M. Fritz, Yorktown Heights, NY (US);
Eric A. Joseph, White Plains, NY (US);
Michael F. Lofaro, Danbury, CT (US);
Hiroyuki Miyazoe, White Plains, NY (US);
Kenneth P. Rodbell, Sandy Hook, CT (US);
Ghavam Shahidi, Pound Ridge, NY (US);
ELPIS TECHNOLOGIES INC., Ottawa, CA;
Abstract
The present disclosure relates to integrated circuits and to methods of manufacturing interconnects of integrated circuits. For example, an integrated circuit includes a surface of the integrated circuit and an interconnect formed on the surface and comprising a metal. An average grain size of the metal of the interconnect is greater than or equal to at least half of a line width of the interconnect. In another example, a method for manufacturing an interconnect of an integrated circuit includes depositing a layer of a metal onto a surface of the integrated circuit, annealing the metal, patterning a first hard mask for placement over the metal and forming a line of the interconnect and a first via of the interconnect by performing a timed etch of the metal using the first hard mask.