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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 10727108 B1

PDFFull Text
Date of Patent:
Jul. 28, 2020

Filed:

Oct. 23, 2018

Dummy gate isolation and method of production thereof

Applicant:

Globalfoundries Inc., Grand Cayman, KY;

Inventors:

David Pritchard, Glenville, NY (US);

Heng Yang, Rexford, NY (US);

Hongru Ren, Mechanicville, NY (US);

Assignee:

GLOBALFOUNDRIES INC., Grand Cayman, KY;

Attorney:

Ditthavong & Steiner, P.C.

Primary Examiner:

Anthony Ho

Int. Cl.
CPC ...
H01L 21/762 (2006.01); H01L 21/84 (2006.01); H01L 29/08 (2006.01); H01L 21/027 (2006.01); H01L 29/66 (2006.01); H01L 27/12 (2006.01); H01L 21/285 (2006.01); H01L 29/78 (2006.01);
U.S. Cl.
CPC ...
H01L 21/76283 (2013.01); H01L 21/0271 (2013.01); H01L 21/28518 (2013.01); H01L 21/76289 (2013.01); H01L 21/84 (2013.01); H01L 27/1203 (2013.01); H01L 29/0847 (2013.01); H01L 29/66545 (2013.01); H01L 29/66568 (2013.01); H01L 29/78 (2013.01);
Abstract

The present disclosure relates to an isolation region between semiconductor devices and methods of fabrication. Embodiments include device having a silicon-on-insulator (SOI) substrate; a dummy gate between two metal gates formed over the SOI substrate, the dummy gate providing a physical diffusion break between the two metal gates; raised source/drain (S/D) regions formed on sides of the metal gates; and interlayer dielectric formed over the dummy gate, raised S/D regions and metal gates and in openings on sides of the dummy gate.

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Pritchard, David. (2020). Dummy gate isolation and method of production thereof (U.S. Patent No. 10727108). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/10727108

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