The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 28, 2020

Filed:

Jul. 27, 2018
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

David Durham, Beaverton, OR (US);

Siddhartha Chhabra, Portland, OR (US);

Kai Cong, Hillsboro, OR (US);

Ron Gabor, Herzliya, IS;

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 11/07 (2006.01); G06F 3/06 (2006.01); G06F 21/60 (2013.01); G06F 21/64 (2013.01);
U.S. Cl.
CPC ...
G06F 11/0787 (2013.01); G06F 3/0659 (2013.01); G06F 3/0673 (2013.01); G06F 11/073 (2013.01); G06F 11/0751 (2013.01); G06F 21/602 (2013.01); G06F 21/64 (2013.01); G06F 3/0619 (2013.01); G06F 2221/2107 (2013.01); G06F 2221/2113 (2013.01);
Abstract

An embodiment of a semiconductor package apparatus may include technology to determine if an access request (e.g., a read or write request) to a memory location would result in an integrity failure and, if so determined, read previous data from the memory location, set an indicator to indicate the integrity failure, and store the previous data together with the indicator and previous authentication information. Other embodiments are disclosed and claimed.


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