The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 28, 2020

Filed:

May. 18, 2018
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Jakub Radtke, Gdansk, PL;

Wojciech Malikowski, Gdansk, PL;

Tobiasz Domagala, Gdansk, PL;

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 3/06 (2006.01); G06F 12/1009 (2016.01);
U.S. Cl.
CPC ...
G06F 3/065 (2013.01); G06F 3/0604 (2013.01); G06F 3/064 (2013.01); G06F 3/0616 (2013.01); G06F 3/0679 (2013.01); G06F 12/1009 (2013.01); G06F 2212/1008 (2013.01); G06F 2212/7201 (2013.01);
Abstract

Examples may include a non-volatile memory having a memory including a first table of device physical addresses and a second table of physical device addresses; a control register to receive a clone command to clone a second memory region of the memory as a copy of a first memory region of the memory, the first and second memory regions being referenced by different device physical addresses; and address translation logic, upon receipt of the clone command, create a first entry in the first table for each page of the first memory region and create a second entry in the first table for each page of the second memory region, each first table entry for the first memory region and each first table entry for the second memory region pointing to a same entry in the second table.


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