The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 21, 2020

Filed:

Jan. 11, 2018
Applicant:

Optimum Semiconductor Technologies, Inc., Tarrytown, NY (US);

Inventors:

Mayan Moudgill, Chappaqua, NY (US);

A. Joseph Hoane, Yonkers, NY (US);

Lei Wang, Beijing, CN;

Gary Nacer, Morris Plains, NJ (US);

Aaron G. Milbury, New City, NY (US);

Enrique A. Barria, Bronxville, NY (US);

Paul Hurtley, White Plains, NY (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/1027 (2016.01); G06F 12/1036 (2016.01); G06F 12/1009 (2016.01); G06F 12/0864 (2016.01);
U.S. Cl.
CPC ...
G06F 12/1027 (2013.01); G06F 12/1009 (2013.01); G06F 12/1036 (2013.01); G06F 12/0864 (2013.01); G06F 2212/1021 (2013.01); G06F 2212/1044 (2013.01); G06F 2212/652 (2013.01); G06F 2212/656 (2013.01); G06F 2212/657 (2013.01); G06F 2212/68 (2013.01);
Abstract

A processor includes a translation lookaside buffer (TLB) comprising a plurality of ways, wherein each way is associated with a respective page size, and a processing core, communicatively coupled to the TLB, to execute an instruction associated with a virtual memory page, identify a first way of the plurality of ways, wherein the first way is associated with a first page size, determine an index value using the virtual memory page and the first page size for the first way, determine, using the index value, a first TLB entry of the first way, and translate, using a memory address translation stored in the first TLB entry, the first virtual memory page to a first physical memory page.


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