The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 21, 2020
Filed:
Dec. 14, 2014
Via Alliance Semiconductor Co., Ltd., Shanghai, CN;
Douglas R. Reed, Austin, TX (US);
VIA ALLIANCE SEMICONDUCTORS CO., LTD., Shanghai, CN;
Abstract
A cache stores 2{circumflex over ( )}J-byte cache lines has an array of 2{circumflex over ( )}N sets each holds tags each X bits and 2{circumflex over ( )}W ways. An input receives a Q-bit address, MA[(Q−1):0], having a tag MA[(Q−1):(Q−X)] and index MA[(Q−X−1):J]. Q is at least (N+J+X−1). Set selection logic selects one set using the index and tag LSB; comparison logic compares all but the LSB of the tag with all but the LSB of each tag in the selected set and indicates a hit if a match; allocation logic, when the comparison logic indicates there is not a match: allocates into any of the 2{circumflex over ( )}W ways of the selected set when operating in a first mode; and into a subset of the 2{circumflex over ( )}W ways of the selected set when operating in a second mode. The subset of is limited based on bits of the tag portion.