The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 14, 2020
Filed:
Aug. 16, 2017
Applicant:
Globalfoundries Inc., Grand Cayman, KY;
Inventors:
Brent A. Anderson, Jericho, VT (US);
Andres Bryant, Burlington, VT (US);
Edward J. Nowak, Essex Junction, VT (US);
Assignee:
GLOBALFOUNDRIES INC., Grand Cayman, KY;
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/78 (2006.01); H01L 21/8238 (2006.01); H01L 27/12 (2006.01); H01L 29/10 (2006.01); H01L 29/66 (2006.01); H01L 21/3115 (2006.01); H01L 21/762 (2006.01);
U.S. Cl.
CPC ...
H01L 29/785 (2013.01); H01L 21/823807 (2013.01); H01L 21/823821 (2013.01); H01L 21/823878 (2013.01); H01L 27/1203 (2013.01); H01L 29/1037 (2013.01); H01L 29/66795 (2013.01); H01L 29/7843 (2013.01); H01L 29/7846 (2013.01); H01L 29/7849 (2013.01); H01L 21/31155 (2013.01); H01L 21/76283 (2013.01); H01L 29/66621 (2013.01);
Abstract
A semiconductor device including semiconductor material having a bend and a trench feature formed at the bend, and a gate structure at least partially disposed in the trench feature. A method of fabricating a semiconductor structure including forming a semiconductor material with a trench feature over a layer, forming a gate structure at least partially in the trench feature, and bending the semiconductor material such that stress is induced in the semiconductor material in an inversion channel region of the gate structure.