The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 14, 2020

Filed:

Sep. 11, 2018
Applicants:

Gachon University of Industry—academic Cooperation Foundation, Seongnam-si, Gyeonggi-do, KR;

Ewha University—industry Collaboration Foundation, Seodaemun-gu, Seoul, KR;

Inventors:

Seongjae Cho, Seoul, KR;

Hyungsoon Shin, Seoul, KR;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/108 (2006.01); H01L 29/78 (2006.01); H01L 29/04 (2006.01); H01L 29/16 (2006.01); H01L 21/02 (2006.01); H01L 21/308 (2006.01); H01L 29/66 (2006.01); H01L 21/3213 (2006.01); H01L 21/265 (2006.01); H01L 29/08 (2006.01); H01L 29/06 (2006.01);
U.S. Cl.
CPC ...
H01L 27/10802 (2013.01); H01L 21/0262 (2013.01); H01L 21/02164 (2013.01); H01L 21/02532 (2013.01); H01L 21/02595 (2013.01); H01L 21/26513 (2013.01); H01L 21/308 (2013.01); H01L 21/32133 (2013.01); H01L 27/10844 (2013.01); H01L 29/04 (2013.01); H01L 29/0649 (2013.01); H01L 29/0847 (2013.01); H01L 29/16 (2013.01); H01L 29/66795 (2013.01); H01L 29/785 (2013.01);
Abstract

The present invention provides a polysilicon-based 1T DRAM cell device having a FinFET structure and its fabrication method. In the present invention, a semiconductor layer (for example, a polysilicon layer) having a relatively low crystallinity is intentionally formed on the upper layer of the active fin to physically trap the holes accumulated in the conventional cell body, thereby remarkably improving the retention time. A polysilicon-based 1T DRAM cell device having a FinFET structure can also increase the operating efficiency by raising the gate's channel control force and implement the batch process with the functional blocks in the CPU that already have the FinFET structure.


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