The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 07, 2020

Filed:

Dec. 14, 2018
Applicant:

Cadence Design Systems, Inc., San Jose, CA (US);

Inventors:

Sutirtha Kabir, Chandler, AZ (US);

Vishal Agarwal, Milpitas, CA (US);

Reenee Raizada Tayal, Delhi, IN;

Assignee:

Cadence Design Systems, Inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 30/398 (2020.01); G06F 3/0482 (2013.01); G06F 30/33 (2020.01); G06F 111/20 (2020.01);
U.S. Cl.
CPC ...
G06F 30/398 (2020.01); G06F 3/0482 (2013.01); G06F 30/33 (2020.01); G06F 2111/20 (2020.01);
Abstract

A computer may generate a record of a template associated with a schematic design corresponding to an integrated circuit design. The template may have one or more instances corresponding to one or more initial parameters associated with a chain of one or more transmission line components of the integrated circuit design. The computer may then modify content of the chain of one or more transmission line components in a circuit layout corresponding to the schematic design within the maximum range limit of the one or more initial parameters. The computer may update the one or more instances according to modified contents of the one or more transmission line components in the circuit layout.


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