The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 30, 2020
Filed:
Nov. 22, 2017
Shanghai Ic R&d Center Co., Ltd., Shanghai, CN;
Chengdu Image Design Technology Co. Ltd., Chengdu, CN;
Chen Li, Shanghai, CN;
Jianxin Wen, Shanghai, CN;
Xiaoliang Zhang, Shanghai, CN;
Changming Pi, Shanghai, CN;
Hailing Yang, Shanghai, CN;
Guidi Zhang, Shanghai, CN;
SHANGHAI IC R&D CENTER CO., LTD, Shanghai, CN;
CHENGDU IMAGE DESIGN TECHNOLOGY CO., LTD., Chengdu, CN;
Abstract
A full-frame image sensor system comprises at least a pair of readout circuits, at least a pair of channel selection circuits, and at least a pair of interface circuits arranged symmetrically with respect to a pixel array; the readout circuits are electrically connected to two sides of the pixel array respectively; the channel selection circuit and the readout circuit on a same side of the pixel array are electrically connected to each other. The interface circuit and the channel selection circuit on a same side of the pixel array are electrically connected to each other. As a result, the circuits on the two sides of the pixel array are substantially symmetrical, the center of the pixel array coincides with the center of the entire chip. It not only brings convenience to the subsequent packaging and application, but also reduces the size of circuit such as the PGA and the ADC on one side of the pixel array, and overcomes the problem that the capacity of circuit such as the PGA and the ADC cannot be increased when the height of the circuits such as the PGA and the ADC cannot exceed the height of the pixel array.