The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 30, 2020

Filed:

Aug. 17, 2018
Applicant:

Qualcomm Incorporated, San Diego, CA (US);

Inventors:

Stanley Seungchul Song, San Diego, CA (US);

Kern Rim, San Diego, CA (US);

Da Yang, San Diego, CA (US);

Peijie Feng, San Diego, CA (US);

Assignee:

QUALCOMM Incorporated, San Diego, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/78 (2006.01); H01L 29/06 (2006.01); H01L 27/092 (2006.01); H01L 29/66 (2006.01); H01L 29/423 (2006.01); H01L 21/8238 (2006.01); H01L 29/165 (2006.01);
U.S. Cl.
CPC ...
H01L 29/7849 (2013.01); H01L 21/823807 (2013.01); H01L 27/0924 (2013.01); H01L 29/0653 (2013.01); H01L 29/165 (2013.01); H01L 29/42392 (2013.01); H01L 29/66545 (2013.01);
Abstract

Cell circuits having a diffusion break with avoided or reduced adjacent semiconductor channel strain relaxation and related methods are disclosed. In one aspect, a cell circuit includes a substrate of semiconductor material and a semiconductor channel structure(s) of a second semiconductor material disposed on the substrate. The semiconductor material applies a stress to the formed semiconductor channel structure(s) to induce a strain in the semiconductor channel structure(s) for increasing carrier mobility. A diffusion break comprising a dielectric material extends through a surrounding structure of an interlayer dielectric, and the semiconductor channel structure(s) and at least a portion of the substrate. The relaxation of strain in areas of the semiconductor channel structure(s) adjacent to the diffusion break is reduced or avoided, because the semiconductor channel structure(s) is constrained by the surrounding structure.


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