The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 30, 2020
Filed:
Feb. 13, 2019
Samsung Electronics Co., Ltd., Suwon-si, Gyeonggi-do, KR;
Jin-Nam Kim, Anyang-si, KR;
Rak-Hwan Kim, Suwon-si, KR;
Byung-Hee Kim, Seoul, KR;
Jong-Min Baek, Seoul, KR;
Sang-Hoon Ahn, Goyang-si, KR;
Nae-In Lee, Seoul, KR;
Jong-Jin Lee, Seoul, KR;
Ho-Yun Jeon, Hwaseong-si, KR;
Eun-Ji Jung, Hwaseong-si, KR;
Samsung Electronics Co., Ltd., Suwon-si, KR;
Abstract
Semiconductor devices may include a diffusion prevention insulation pattern, a plurality of conductive patterns, a barrier layer, and an insulating interlayer. The diffusion prevention insulation pattern may be formed on a substrate, and may include a plurality of protrusions protruding upwardly therefrom. Each of the conductive patterns may be formed on each of the protrusions of the diffusion prevention insulation pattern, and may have a sidewall inclined by an angle in a range of about 80 degrees to about 135 degrees to a top surface of the substrate. The barrier layer may cover a top surface and the sidewall of each if the conductive patterns. The insulating interlayer may be formed on the diffusion prevention insulation pattern and the barrier layer, and may have an air gap between neighboring ones of the conductive patterns.