The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 30, 2020

Filed:

Dec. 31, 2018
Applicant:

Denso Corporation, Kariya-shi, JP;

Inventors:

Masaru Senoo, Okazaki, JP;

Jun Okawara, Nisshin, JP;

Assignee:

DENSO CORPORATION, Kariya-shi, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/02 (2006.01); H01L 29/739 (2006.01); H01L 29/08 (2006.01); H01L 29/861 (2006.01);
U.S. Cl.
CPC ...
H01L 27/0255 (2013.01); H01L 29/0834 (2013.01); H01L 29/7397 (2013.01); H01L 29/8611 (2013.01);
Abstract

A semiconductor apparatus includes a semiconductor substrate provided with a plurality of diode ranges and a plurality of IGBT ranges. The IGBT ranges and the diode ranges are alternately arranged along a first direction in plan view of the semiconductor substrate along a thickness direction of the semiconductor substrate. Each diode range is provided with a plurality of n-type cathode regions and a plurality of p-type current-limiting regions in a range of being in contact with a lower electrode. The cathode regions and the current-limiting regions are alternately arranged along a second direction intersecting the first direction in each diode range. Each IGBT range is provided with a p-type collector region in a range of being in contact with the lower electrode. The collector region in each IGBT range is in contact with each cathode region in the adjacent diode range.


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