The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 30, 2020

Filed:

Nov. 06, 2017
Applicant:

Globalfoundries Inc., Grand Cayman, KY;

Inventors:

Anthony K. Stamper, Burlington, VT (US);

Patrick S. Spinney, Charlotte, VT (US);

Jeffrey C. Stamm, Colchester, VT (US);

Assignee:

GLOBALFOUNDERS INC., Grand Cayman, KY;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/544 (2006.01); H01L 23/00 (2006.01); H01L 21/66 (2006.01); H01L 21/78 (2006.01);
U.S. Cl.
CPC ...
H01L 22/32 (2013.01); H01L 21/78 (2013.01); H01L 22/30 (2013.01); H01L 22/34 (2013.01); H01L 23/544 (2013.01); H01L 23/562 (2013.01); H01L 2223/5446 (2013.01);
Abstract

A test structure for semiconductor chips of a wafer, and the method of forming the same is included. The test structure may include a first portion disposed within a corner area of a first chip on the wafer, and at least another portion disposed within another corner of another chip on the wafer, wherein before dicing of the chips, the portions form the test structure. The test structure may include an electronic test structure or an optical test structure. The electronic test structure may include probe pads, each probe pad positioned across two or more corner areas of two or more chips. The corner areas including the test structures disposed therein may be removed from the chips during a dicing of the chips.


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