The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 30, 2020
Filed:
Sep. 18, 2018
Applicant:
Spin Memory, Inc., Fremont, CA (US);
Inventors:
Neal Berger, Cupertino, CA (US);
Susmita Karmakar, Fremont, CA (US);
Benjamin Louie, Fremont, CA (US);
Assignee:
Spin Memory, Inc., Fremont, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 8/08 (2006.01); G11C 11/16 (2006.01); G11C 8/10 (2006.01); G11C 5/14 (2006.01);
U.S. Cl.
CPC ...
G11C 8/08 (2013.01); G11C 5/14 (2013.01); G11C 8/10 (2013.01); G11C 11/1657 (2013.01); G11C 11/1659 (2013.01);
Abstract
A clocked driver circuit can include a level shifter latch and a driver. The level shifter latch can be configured to receive an input signal upon a clock signal and generate a level shifted output signal. The driver can be configured to receive the level shifted output signal from the level shifter and drive the output signal on a line. The signal levels of the output signal can be greater than the signal level of the input signal.