The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 30, 2020
Filed:
Mar. 12, 2019
Arm Limited, Cambridge, GB;
Gurunath Ramagiri, Austin, TX (US);
Ashok Kumar Tummala, Cedar Park, TX (US);
Mark David Werkheiser, Austin, TX (US);
Jamshed Jalal, Austin, TX (US);
Premkishore Shivakumar, Austin, TX (US);
Paul Gilbert Meyer, Rollingwood, TX (US);
Arm Limited, Cambridge, GB;
Abstract
In a system-on-chip there is a local interconnect to connect local devices on the chip to one another, a gateway to connect the chip to a remote chip of a plurality of chips in a cache-coherent multi-chip system via an inter-chip interconnect, and a cache-coherent device. The cache-coherent device has a cache-coherency look-up table having entries for shared cache data lines. When a data access request is received via the inter-chip interconnect and the local interconnect a system-unique identifier for a request source of the data access request is generated in dependence on an inter-chip request source identifier used on the inter-chip interconnect and an identifier indicative of the remote chip. The bit-set used to express the system-unique identifier is larger than the bit-set used to express the inter-chip request source identifier. The system-unique identifier is used with respect to the cache-coherency look-up table to perform the cache-coherency actions for the cache line enabling more cache coherent devices to be supported.