The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 23, 2020
Filed:
Sep. 18, 2017
Applicant:
Qualcomm Incorporated, San Diego, CA (US);
Inventors:
Renukprasad Hiremath, San Diego, CA (US);
Hyeokjin Lim, San Diego, CA (US);
Foua Vang, Anaheim, CA (US);
Xiangdong Chen, San Diego, CA (US);
Venugopal Boynapalli, San Marcos, CA (US);
Assignee:
QUALCOMM Incorporated, San Diego, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/522 (2006.01); H01L 27/02 (2006.01); H01L 23/528 (2006.01); H01L 27/092 (2006.01);
U.S. Cl.
CPC ...
H01L 23/5223 (2013.01); H01L 23/528 (2013.01); H01L 27/0207 (2013.01); H01L 27/092 (2013.01);
Abstract
In certain aspects, a semiconductor die includes a first doped region, a second doped region, and an interconnect formed from a first middle of line (MOL) layer, wherein the interconnect electrically couples the first doped region to the second doped region. The semiconductor die also includes a first metal line formed from a first interconnect metal layer, and a first via electrically coupling the interconnect to the first metal line.