The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 16, 2020
Filed:
Dec. 19, 2018
Applicant:
Cypress Semiconductor Corporation, San Jose, CA (US);
Inventors:
Chun Chen, San Jose, CA (US);
Shenqing Fang, Sunnyvale, CA (US);
Assignee:
Cypress Semiconductor Corporation, San Jose, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/28 (2006.01); H01L 29/423 (2006.01); H01L 29/66 (2006.01); H01L 29/792 (2006.01);
U.S. Cl.
CPC ...
H01L 29/40117 (2019.08); H01L 29/42344 (2013.01); H01L 29/66833 (2013.01); H01L 29/792 (2013.01);
Abstract
A memory device that has a first gate disposed adjacent to a second gate and a first dielectric structure disposed between the first and second gates. The first dielectric structure has at least four layers of oxide and nitride films arranged in an alternating layer, in which each of the at least four or more layers includes a width in an approximate range of 30 Å or less. The first dielectric structure further includes a top surface that is substantially un-etched.