The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 16, 2020
Filed:
Jul. 27, 2018
Applicant:
Globalfoundries Inc., Grand Cayman, KY;
Inventors:
Faraz Khan, Los Angeles, CA (US);
Norman W. Robson, Hopewell Junction, NY (US);
Toshiaki Kirihata, Poughkeepsie, NY (US);
Danny Moy, Bethel, CT (US);
Darren L. Anand, Williston, VT (US);
Assignee:
GLOBALFOUNDRIES INC., Grand Cayman, KY;
Primary Examiner:
Int. Cl.
CPC ...
G11C 16/04 (2006.01); G11C 11/56 (2006.01); H01L 29/792 (2006.01); H01L 27/11573 (2017.01); H01L 29/73 (2006.01); G11C 16/10 (2006.01); G11C 16/14 (2006.01);
U.S. Cl.
CPC ...
G11C 11/5671 (2013.01); G11C 16/0466 (2013.01); G11C 16/10 (2013.01); G11C 16/14 (2013.01); H01L 27/11573 (2013.01); H01L 29/73 (2013.01); H01L 29/7923 (2013.01);
Abstract
The present disclosure generally relates to semiconductor structures and, more particularly, to program and erase memory structures and methods of manufacture. The semiconductor memory includes: a charge trap transistor; and a self-heating circuit which selectively applies voltages to terminals of the charge trap transistor to assist in erase operations of the charge trap transistor.