Series-connected fets in active linear mode

Abstract

The addition of gate bias resistors substantially balances the voltage across any number of series-connected FETs, while the feedback control of the gate-source voltage of one FET controls the current through all of the FETs. In this way, the thermal load and voltage stress are substantially balanced for series connected FETs operating in active linear mode (partially on), enabling operation at voltages much higher than the individual ratings of low cost, readily available FETs. Alternatively, series-connecting FETs for active-mode operation is thermally equivalent to paralleling because the FET heat load is practically uniform, enabling operation at much higher current. This concept is extended to a series connection of FETs that can block, pass, and/or limit alternating load current with the voltage applied across all the FETs being either polarity or alternating polarity. We provide analysis, practical design considerations, and simulation results.