The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 02, 2020
Filed:
Dec. 08, 2017
Applicant:
SK Hynix Inc., Gyeonggi-do, KR;
Inventors:
Assignee:
SK hynix Inc., Gyeonggi-do, KR;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/00 (2006.01); H01L 27/108 (2006.01); H01L 21/02 (2006.01); H01L 49/02 (2006.01); H01L 21/311 (2006.01);
U.S. Cl.
CPC ...
H01L 27/10852 (2013.01); H01L 21/022 (2013.01); H01L 21/02178 (2013.01); H01L 21/02181 (2013.01); H01L 21/02183 (2013.01); H01L 21/02186 (2013.01); H01L 21/02189 (2013.01); H01L 21/02244 (2013.01); H01L 21/02252 (2013.01); H01L 21/02304 (2013.01); H01L 21/31111 (2013.01); H01L 27/10814 (2013.01); H01L 28/91 (2013.01); H01L 27/10823 (2013.01);
Abstract
A method for fabricating semiconductor device includes: forming a bottom electrode of a high aspect ratio; forming an interface layer by sequentially performing a first plasma process and a second plasma process onto a surface of the bottom electrode; forming a dielectric layer over the interface layer; and forming a top electrode over the dielectric layer.