The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 02, 2020
Filed:
Oct. 26, 2017
Applicant:
Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;
Inventors:
Zhi-Qiang Wu, Hsinchu County, TW;
Chun-Fu Cheng, Hsinchu County, TW;
Chung-Cheng Wu, Hsinchu County, TW;
Yi-Han Wang, Yunlin County, TW;
Chia-Wen Liu, Taipei, TW;
Assignee:
TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., Hsinchu, TW;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/66 (2006.01); H01L 25/065 (2006.01); H01L 21/02 (2006.01); H01L 25/04 (2014.01); H01L 29/423 (2006.01); H01L 29/10 (2006.01); H01L 29/08 (2006.01); H01L 29/775 (2006.01); H01L 29/786 (2006.01); H01L 29/06 (2006.01); H01L 27/06 (2006.01); H01L 29/40 (2006.01); H01L 27/092 (2006.01); H01L 29/78 (2006.01); H01L 21/8238 (2006.01); B82Y 99/00 (2011.01); B82Y 10/00 (2011.01);
U.S. Cl.
CPC ...
H01L 25/0657 (2013.01); H01L 21/02008 (2013.01); H01L 21/823807 (2013.01); H01L 25/043 (2013.01); H01L 27/0617 (2013.01); H01L 27/092 (2013.01); H01L 29/0673 (2013.01); H01L 29/0847 (2013.01); H01L 29/1054 (2013.01); H01L 29/401 (2013.01); H01L 29/42376 (2013.01); H01L 29/42392 (2013.01); H01L 29/66 (2013.01); H01L 29/66439 (2013.01); H01L 29/775 (2013.01); H01L 29/7853 (2013.01); H01L 29/78696 (2013.01); B82Y 10/00 (2013.01); B82Y 99/00 (2013.01); H01L 21/823814 (2013.01);
Abstract
A device includes a substrate, a stacked structure and a first gate stack. The stacked structure includes a plurality of first semiconductor layers and a plurality of second semiconductor layers alternately stacked over the substrate. One of the first semiconductor layers has a height greater than a height of one the second semiconductor layers. The first gate stack wraps around the stacked structure.