The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 02, 2020
Filed:
Sep. 26, 2018
Applicant:
Nxp Usa, Inc., Austin, TX (US);
Inventors:
Vikas Shilimkar, Chandler, AZ (US);
Kevin Kim, Gilbert, AZ (US);
Hernan Rueda, Chandler, AZ (US);
Humayun Kabir, Gilbert, AZ (US);
Assignee:
NXP USA, Inc., Austin, TX (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/522 (2006.01); H01L 23/528 (2006.01); H01L 23/31 (2006.01); H01L 21/56 (2006.01); H01L 27/088 (2006.01); H01L 21/8234 (2006.01);
U.S. Cl.
CPC ...
H01L 23/5225 (2013.01); H01L 21/56 (2013.01); H01L 21/823475 (2013.01); H01L 23/3135 (2013.01); H01L 23/3171 (2013.01); H01L 23/528 (2013.01); H01L 23/5228 (2013.01); H01L 27/088 (2013.01); H01L 23/5226 (2013.01);
Abstract
A transistor includes a semiconductor substrate having an active device region formed therein and an interconnect structure on a first surface of the semiconductor substrate. The interconnect structure is formed of multiple layers of dielectric material and electrically conductive material. Drain and gate runners are formed in the interconnect structure. A shield structure extends above a second surface of the interconnect structure, the shield structure being positioned between the drain and gate runners.