The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 26, 2020

Filed:

Dec. 04, 2018
Applicant:

Winbond Electronics Corp., Taichung, TW;

Inventors:

Makoto Senoo, Taichung, TW;

Hiroki Murakami, Taichung, TW;

Kazuki Yamauchi, Taichung, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 7/10 (2006.01); G11C 16/32 (2006.01); G11C 16/04 (2006.01); G11C 16/30 (2006.01); G11C 16/08 (2006.01); G11C 16/10 (2006.01); G11C 7/22 (2006.01); G11C 16/26 (2006.01); G11C 7/20 (2006.01);
U.S. Cl.
CPC ...
G11C 16/32 (2013.01); G11C 7/222 (2013.01); G11C 7/225 (2013.01); G11C 16/0483 (2013.01); G11C 16/08 (2013.01); G11C 16/10 (2013.01); G11C 16/26 (2013.01); G11C 16/30 (2013.01); G11C 7/20 (2013.01);
Abstract

A semiconductor memory device which is able to perform a power sequence with high reliability is provided. When a power from an external device is supplied, the controller of the flash memory of the invention is configured to read codes stored in a read-only memory in synchronization with a clock signal to perform a power-on sequence. In addition, the controller is further configured to deactivate the clock signal so as to pause the power-on sequence when it has been detected during the power-on sequence that the voltage of the power is not greater than a threshold, and to activate the clock signal to resume the power-on sequence when it is detected that the voltage of the supplied power exceeds the threshold again.


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