The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 26, 2020

Filed:

May. 23, 2018
Applicant:

Micron Technology, Inc., Boise, ID (US);

Inventors:

Yuki Ebihara, Chofu, JP;

Seiji Narui, Sagamihara, JP;

Assignee:

Micron Technology, Inc., Boise, ID (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/00 (2006.01); G06F 13/42 (2006.01); G11C 11/4093 (2006.01); G11C 11/402 (2006.01); H01L 27/108 (2006.01);
U.S. Cl.
CPC ...
G06F 13/4265 (2013.01); G11C 11/4023 (2013.01); G11C 11/4093 (2013.01); H01L 27/108 (2013.01);
Abstract

Apparatuses and methods of data transmission between semiconductor chips are described. An example apparatus includes: a data bus inversion (DBI) circuit that receives first, second and third input data in order, and further provides first, second and third output data, either with or without data bus inversion. The DBI circuit includes a first circuit that latches the first input data and the third input data; a second circuit that latches the second input data; a first DBI calculator circuit that performs first DBI calculation on the latched first input data and the latched second input data responsive to the first circuit latching the first input data and the second circuit latching the second input data, respectively; and a second DBI calculator circuit that performs second DBI calculation on the latched second data and the latched third input data responsive to the first circuit latching the third input data.


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