The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 26, 2020
Filed:
Mar. 27, 2017
Applicant:
Micron Technology, Inc., Boise, ID (US);
Inventors:
Victor Tsai, Palo Alto, CA (US);
William Henry Radke, Los Gatos, CA (US);
Bob Leibowitz, Boise, ID (US);
Assignee:
Micron Technology, Inc., Boise, ID (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 3/00 (2006.01); G06F 12/00 (2006.01); G06F 12/1081 (2016.01); G06F 13/42 (2006.01); G06F 11/30 (2006.01); G06F 13/16 (2006.01); G06F 13/28 (2006.01); G06F 13/40 (2006.01);
U.S. Cl.
CPC ...
G06F 12/1081 (2013.01); G06F 3/007 (2013.01); G06F 11/3034 (2013.01); G06F 13/16 (2013.01); G06F 13/28 (2013.01); G06F 13/4063 (2013.01); G06F 13/4208 (2013.01); G06F 13/4234 (2013.01);
Abstract
Memory devices and methods are described and shown that are capable of being configured in a chain. In one configuration, a single data input port and a single data output port are utilized at a host to communicate with the chain of memory devices. Methods for assigning identifiers to memory devices in the chain are described that include detection of a presence or absence of downstream memory devices. In selected examples, identifiers are assigned sequentially to memory devices in the chain until no additional downstream memory devices are detected.