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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 10658497 B1

PDFFull Text
Date of Patent:
May. 19, 2020

Filed:

Aug. 03, 2018

Method for manufacturing semiconductor devices with superjunction structures

Applicant:

Infineon Technologies Austria Ag, Villach, AT;

Inventors:

Daniel Hölzl, Unterhaching, DE;

Henning Kraack, Villach, AT;

Gabor Mezoesi, Villach, AT;

Hans-Joachim Schulze, Taufkirchen, DE;

Waqas Mumtaz Syed, Villach, AT;

Assignee:

Infineon Technologies Austria AG, Villach, AT;

Attorney:

Murphy, Bilak & Homiller, PLLC

Primary Examiner:

Tu-Tu V Ho

Int. Cl.
CPC ...
H01L 29/739 (2006.01); H01L 29/66 (2006.01); H01L 29/06 (2006.01); C30B 31/22 (2006.01); H01L 21/322 (2006.01); C30B 29/06 (2006.01); H01L 21/306 (2006.01); H01L 29/08 (2006.01);
U.S. Cl.
CPC ...
H01L 29/7395 (2013.01); C30B 29/06 (2013.01); C30B 31/22 (2013.01); H01L 21/30604 (2013.01); H01L 21/3225 (2013.01); H01L 29/0634 (2013.01); H01L 29/0878 (2013.01); H01L 29/66333 (2013.01); H01L 29/66712 (2013.01);
Abstract

A method for forming semiconductor device includes providing a semiconductor substrate having an initial surface oxygen concentration in a surface region of less than 6×10cm, forming an epitaxial layer on a first side of the semiconductor substrate, and implanting dopants into the epitaxial layer. An optional thermal anneal is carried out prior to forming the epitaxial layer and/or a thermal treatment is carried out after implanting dopants.

Find Patent Forward Citations

Hölzl, Daniel. (2020). Method for manufacturing semiconductor devices with superjunction structures (U.S. Patent No. 10658497). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/10658497

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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