The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 19, 2020

Filed:

Sep. 17, 2018
Applicant:

Seiko Epson Corporation, Tokyo, JP;

Inventors:

Takeshi Yuzawa, Chino, JP;

Masatoshi Tagaki, Suwa, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/40 (2006.01); H01L 21/44 (2006.01); H01L 23/00 (2006.01); H01L 23/498 (2006.01); H01L 23/48 (2006.01); H01L 23/528 (2006.01); H01L 23/532 (2006.01);
U.S. Cl.
CPC ...
H01L 24/29 (2013.01); H01L 23/481 (2013.01); H01L 23/49811 (2013.01); H01L 23/528 (2013.01); H01L 23/5283 (2013.01); H01L 23/53214 (2013.01); H01L 23/53219 (2013.01); H01L 24/05 (2013.01); H01L 2224/05687 (2013.01); H01L 2224/13144 (2013.01); H01L 2924/05042 (2013.01); H01L 2924/35 (2013.01);
Abstract

A semiconductor device includes a semiconductor chip, wiring that is included in the semiconductor chip and his a coupling part between parts with different widths, a pad being formed above the wiring and in a position overlapping the coupling part, a bump being formed on the pad, a buffer layer being formed in a position between the coupling part and the pad so as to cover the entire couple part, and inorganic insulating layers being formed between the wiring and the buffer layer and between the buffer layer and the pad, respectively. The buffer layer is made of a material other than resin and softer than the inorganic insulating layer.


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