The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 19, 2020

Filed:

Jun. 30, 2018
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Eliezer Tamir, Bait Shemesh, IL;

Bruce Richardson, Shannon, IE;

Niall Power, Limerick, IE;

Andrew Cunningham, Ennis, IE;

David Hunt, Meelick, IE;

Kevin Devey, Limerick, IE;

Changzheng Wei, Shang Hai, CN;

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/084 (2016.01); G06F 12/1072 (2016.01); H04L 12/933 (2013.01); G06F 12/128 (2016.01); G06F 13/28 (2006.01);
U.S. Cl.
CPC ...
G06F 12/084 (2013.01); G06F 12/1072 (2013.01); G06F 12/128 (2013.01); G06F 13/28 (2013.01); H04L 49/10 (2013.01); G06F 2212/1024 (2013.01); G06F 2212/154 (2013.01); G06F 2212/622 (2013.01);
Abstract

Technologies for demoting cache lines to a shared cache include a compute device with at least one processor having multiple cores, a cache memory with a core-local cache and a shared cache, and a cache line demote device. A processor core of a processor of the compute device is configured to retrieve at least a portion of data of a received network packet and move the data into one or more core-local cache lines of the core-local cache. The processor core is further configured to perform a processing operation on the data and transmit a cache line demotion command to the cache line demote device subsequent to having completed the processing operation. The cache line demote device is configured to perform a cache line demotion operation to demote the data from the core-local cache lines to shared cache lines of the shared cache. Other embodiments are described herein.


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