The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 19, 2020

Filed:

Mar. 14, 2018
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Maxim Loktyukhin, Folsom, CA (US);

Eric W. Mahurin, Austin, TX (US);

Bret L. Toll, Hillsboro, OR (US);

Martin G. Dixon, Portland, OR (US);

Sean P. Mirkes, Beaverton, OR (US);

David L. Kreitzer, Bristow, VA (US);

Elmoustapha Ould-Ahmed-Vall, Chandler, AZ (US);

Vinodh Gopal, Westborough, MA (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 9/30 (2018.01); G06F 9/38 (2018.01);
U.S. Cl.
CPC ...
G06F 9/30145 (2013.01); G06F 9/30018 (2013.01); G06F 9/30029 (2013.01); G06F 9/30094 (2013.01); G06F 9/3802 (2013.01);
Abstract

Receiving an instruction indicating a source operand and a destination operand. Storing a result in the destination operand in response to the instruction. The result operand may have: (1) first range of bits having a first end explicitly specified by the instruction in which each bit is identical in value to a bit of the source operand in a corresponding position; and (2) second range of bits that all have a same value regardless of values of bits of the source operand in corresponding positions. Execution of instruction may complete without moving the first range of the result relative to the bits of identical value in the corresponding positions of the source operand, regardless of the location of the first range of bits in the result. Execution units to execute such instructions, computer systems having processors to execute such instructions, and machine-readable medium storing such an instruction are also disclosed.


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