The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 12, 2020

Filed:

Feb. 28, 2019
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Shankar Natarajan, Folsom, CA (US);

Sriram Natarajan, Folsom, CA (US);

Suresh Nagarajan, Folsom, CA (US);

Ramkarthik Ganesan, Folsom, CA (US);

Arun S. Athreya, Folsom, CA (US);

Romesh B. Trivedi, Folsom, CA (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 12/06 (2006.01); G11C 11/56 (2006.01); G11C 16/16 (2006.01); G11C 16/20 (2006.01); G11C 16/10 (2006.01);
U.S. Cl.
CPC ...
G11C 11/5635 (2013.01); G06F 12/0646 (2013.01); G11C 11/5628 (2013.01); G11C 16/10 (2013.01); G11C 16/16 (2013.01); G11C 16/20 (2013.01); G11C 2211/5641 (2013.01);
Abstract

Systems, apparatuses and methods may provide for technology to determine a programmable eviction ratio associated with a storage device and convert a portion of a single-level cell region in the storage device into a multi-level cell region in accordance with the programmable eviction ratio. In one example, the amount of the portion converted into the multi-level cell region varies gradually as a function of percent capacity filled in the storage device.


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