The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 21, 2020

Filed:

Jun. 11, 2019
Applicant:

Nxp Usa, Inc., Austin, TX (US);

Inventors:

Lingling Wang, Shanghai, CN;

Wanfu Ye, Shanghai, CN;

Kai-wen Cheng, Taipei, TW;

Assignee:

NXP USA, Inc., Austin, TX (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H02M 1/42 (2007.01); H02M 1/08 (2006.01); H02M 1/00 (2006.01);
U.S. Cl.
CPC ...
H02M 1/4208 (2013.01); H02M 1/083 (2013.01); H02M 1/4233 (2013.01); H02M 2001/0009 (2013.01); H02M 2001/0058 (2013.01);
Abstract

A critical conduction mode (CRM) bridgeless PFC system includes a PFC converter connected to an Alternating Current (AC) source, a zero-current detection (ZCD) circuit for detecting a zero-current state of the PFC converter, a zero-voltage switching (ZVS) detection circuit, and a processor. Voltage divider circuits receive a first voltage and a supply voltage from the PFC converter and the AC source. The ZCD circuit receives divided voltages generated by the voltage divider circuits and generates a ZCD signal. The ZCD signal is used by the ZVS detection circuit to generate a ZVS flag, which is used by the processor to control switching of first through fourth transistors of the PFC converter.


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