The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 21, 2020
Filed:
Aug. 21, 2017
Jusung Engineering Co., Ltd., Gwangju-si, Gyeonggi-do, KR;
Jeong Ho Seo, Gwangju-si, KR;
Soon Bum Kwon, Gwangju-si, KR;
Ki-Duck Kim, Gwangju-si, KR;
Jong In Kim, Gwangju-si, KR;
Chang Kyun Park, Gwangju-si, KR;
Won Suk Shin, Gwangju-si, KR;
Kyoung Jin Lim, Gwangju-si, KR;
Beop Jong Jin, Gwangju-si, KR;
JUSUNG ENGINEERING CO., LTD., , KR;
Abstract
The present invention provides a method of manufacturing a solar cell, the method including: a process of forming a first semiconductor layer on an upper surface of a semiconductor wafer and forming a second semiconductor layer, having a polarity different from a polarity of the first semiconductor layer, on a lower surface of the semiconductor wafer; a process of forming a first transparent conductive layer on an upper surface of the first semiconductor layer to externally expose a portion of the first semiconductor layer and forming a second transparent conductive layer on a lower surface of the second semiconductor layer to externally expose a portion of the second semiconductor layer; and a plasma treatment process on at least one of the first transparent conductive layer and the second transparent conductive layer, wherein the plasma treatment process includes a process of removing the externally exposed portion of the first semiconductor layer and the externally exposed portion of the second semiconductor layer.