The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 21, 2020
Filed:
Jul. 20, 2017
Applicant:
United Microelectronics Corp., Hsin-Chu, TW;
Inventors:
Pengfei Guo, Singapore, SG;
Shao-Hui Wu, Singapore, SG;
Hai Biao Yao, Singapore, SG;
Yu-Cheng Tung, Kaohsiung, TW;
Yuanli Ding, Singapore, SG;
Zhibiao Zhou, Singapore, SG;
Assignee:
UNITED MICROELECTRONICS CORP., Hsin-Chu, TW;
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/786 (2006.01); H01L 29/78 (2006.01); H01L 29/49 (2006.01); H01L 29/417 (2006.01);
U.S. Cl.
CPC ...
H01L 29/78696 (2013.01); H01L 29/41733 (2013.01); H01L 29/4908 (2013.01); H01L 29/7869 (2013.01); H01L 29/78391 (2014.09); H01L 29/78648 (2013.01);
Abstract
A semiconductor device includes a substrate, a source region and a drain region, a gate dielectric layer, and a ferroelectric material layer. The ferroelectric material layer overlaps with the source region and overlaps with the drain region. The substrate further comprises a channel layer. A gate electrode is disposed on the substrate. The ferroelectric material layer is disposed between the channel layer and the gate electrode.