The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 21, 2020

Filed:

Apr. 25, 2018
Applicant:

Ngk Insulators, Ltd., Nagoya-shi, Aichi, JP;

Inventors:

Mikiya Ichimura, Ichinomiya, JP;

Sota Maehara, Nagoya, JP;

Yoshitaka Kuraoka, Okazaki, JP;

Assignee:

NGK INSULATORS, LTD., Nagoya-Shi, Aichi, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/02 (2006.01); H01L 29/20 (2006.01); C23C 16/30 (2006.01); H01L 29/778 (2006.01); H01L 29/36 (2006.01); C30B 29/40 (2006.01); C30B 25/02 (2006.01); C30B 29/38 (2006.01); H01L 29/205 (2006.01); H01L 29/66 (2006.01); H01L 29/207 (2006.01);
U.S. Cl.
CPC ...
H01L 29/2003 (2013.01); C23C 16/303 (2013.01); C30B 25/02 (2013.01); C30B 29/38 (2013.01); C30B 29/406 (2013.01); H01L 21/0242 (2013.01); H01L 21/0254 (2013.01); H01L 21/0262 (2013.01); H01L 21/02389 (2013.01); H01L 21/02458 (2013.01); H01L 29/205 (2013.01); H01L 29/36 (2013.01); H01L 29/66462 (2013.01); H01L 29/778 (2013.01); H01L 29/7786 (2013.01); H01L 29/207 (2013.01);
Abstract

An epitaxial substrate for semiconductor elements suppresses leakage current and has a high breakdown voltage. The epitaxial substrate for semiconductor elements includes: a semi-insulating free-standing substrate formed of GaN doped with Zn; a buffer layer formed of a group 13 nitride adjacent to the free-standing substrate; a channel layer formed of a group 13 nitride adjacent to the buffer layer; and a barrier layer formed of a group 13 nitride on an opposite side of the buffer layer with the channel layer therebetween, wherein part of a first region consisting of the free-standing substrate and the buffer layer is a second region containing Si at a concentration of 1×10cmor more, and a minimum value of a concentration of Zn in the second region is 1×10cm.


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