The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 21, 2020

Filed:

Nov. 20, 2018
Applicant:

Sandisk Technologies Llc, Addison, TX (US);

Inventors:

Satoshi Shimizu, Yokkaichi, JP;

Yu-Hsien Hsu, Yokkaichi, JP;

Kiyohiko Sakakibara, Yokkaichi, JP;

Assignee:

SANDISK TECHNOLOGIES LLC, Addison, TX (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/11582 (2017.01); H01L 23/522 (2006.01); H01L 29/10 (2006.01); H01L 29/36 (2006.01); H01L 27/11573 (2017.01); H01L 27/1157 (2017.01); H01L 29/167 (2006.01); H01L 27/11565 (2017.01); H01L 21/311 (2006.01); H01L 21/02 (2006.01); H01L 21/225 (2006.01); H01L 21/324 (2006.01); H01L 23/528 (2006.01); H01L 29/08 (2006.01);
U.S. Cl.
CPC ...
H01L 27/11582 (2013.01); H01L 21/02576 (2013.01); H01L 21/02636 (2013.01); H01L 21/2252 (2013.01); H01L 21/31111 (2013.01); H01L 21/324 (2013.01); H01L 23/528 (2013.01); H01L 23/5226 (2013.01); H01L 27/1157 (2013.01); H01L 27/11565 (2013.01); H01L 27/11573 (2013.01); H01L 29/0847 (2013.01); H01L 29/1037 (2013.01); H01L 29/167 (2013.01); H01L 29/36 (2013.01);
Abstract

A three-dimensional semiconductor device includes source-level material layers including a doped semiconductor source contact layer including boron atoms and n-type dopant atoms, an alternating stack of insulating layers and electrically conductive layers located over the source-level material layers, memory stack structures vertically extending through the alternating stack in which each of the memory stack structures comprises a memory film and a vertical semiconductor channel. Each vertical semiconductor channel includes a first region in which n-type dopants have a higher atomic concentration than boron atoms and a second region overlying the first region that includes boron atoms at a higher atomic concentration than n-type dopant atoms to provide a p-n junction at an interface with the first region. Boron atoms in the source-level p-doped layer and an underlying source-level sacrificial layer that is replaced with an n-doped source contact layer yields a sharp p-n junction at the source-select gate electrode layer.


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