The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 21, 2020

Filed:

Dec. 13, 2018
Applicant:

Infineon Technologies Ag, Neubiberg, DE;

Inventors:

Thorsten Scharf, Regensburg, DE;

Carsten Ahrens, Regensburg, DE;

Helmut Brech, Lappersdorf, DE;

Martin Gruber, Schwandorf, DE;

Thorsten Meyer, Regensburg, DE;

Matthias Zigldrum, Regensburg, DE;

Assignee:

Infineon Techologies AG, Neubiberg, DE;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/02 (2006.01); H01L 25/16 (2006.01); H01L 23/00 (2006.01); H01L 21/56 (2006.01); H01L 23/31 (2006.01); H01L 23/538 (2006.01);
U.S. Cl.
CPC ...
H01L 25/16 (2013.01); H01L 21/561 (2013.01); H01L 21/565 (2013.01); H01L 21/568 (2013.01); H01L 23/3114 (2013.01); H01L 23/5384 (2013.01); H01L 24/09 (2013.01); H01L 24/17 (2013.01); H01L 24/73 (2013.01); H01L 24/97 (2013.01); H01L 2924/13064 (2013.01); H01L 2924/1433 (2013.01);
Abstract

A semiconductor chip assembly includes first and second semiconductor dies that each include opposite facing upper and lower sides and an outer edge side, and an electrical interposer having opposite facing first and second conductive surfaces and a conductive connection between the conductive surfaces. The second semiconductor die is mounted on top of the first semiconductor die and the interposer such that the lower side of the second semiconductor die faces the first semiconductor die and the interposer, a first lateral section of the second semiconductor die at least partially covers the upper side of the first semiconductor die, and a second lateral section of the second semiconductor die extends past the outer edge side of the first semiconductor die. The first conductive surface is electrically connected to a first terminal that is disposed on a lower side of the second semiconductor die.


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