The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 21, 2020
Filed:
Oct. 24, 2017
Mentor Graphics Corporation, Wilsonville, OR (US);
Suresh Krishnamurthy, Noida, IN;
Deepak Kumar Garg, Noida, IN;
Ankit Garg, Noida, IN;
Saurabh Khaitan, Noida, IN;
Sanjay Gupta, Noida, IN;
John R. Stickley, Lake Oswego, OR (US);
Russell Elias Vreeland, III, Seal Beach, CA (US);
Ronald James Squiers, Castro Valley, CA (US);
Mentor Graphics Corporation, Wilsonville, OR (US);
Abstract
A system for verifying networking system-on-chip designs comprises a reconfigurable hardware modeling device programmed to implement circuitry hardware models and a traffic generation device communicating with the reconfigurable hardware modeling device. The circuitry hardware models comprise a hardware model of a circuit design and a hardware model of interface circuitry. The system employs a backpressure flow control independent of the communication protocol, which can cause the traffic generation device to suspend sending messages when one or more message buffers in the traffic generation device, the reconfigurable hardware modeling device, or both cannot accept more messages based on predetermined conditions.