The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 14, 2020

Filed:

Sep. 10, 2019
Applicant:

Micron Technology, Inc., Boise, ID (US);

Inventors:

Dan Shi, Folsom, CA (US);

Tyler J. Gomm, Boise, ID (US);

Michael J. Allen, Rescue, CA (US);

Assignee:

Micron Technology, Inc., Boise, ID (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03L 7/08 (2006.01); G11C 11/4076 (2006.01); H03K 19/20 (2006.01); H03L 7/081 (2006.01); G11C 11/4074 (2006.01); G11C 11/408 (2006.01);
U.S. Cl.
CPC ...
H03L 7/0802 (2013.01); G11C 11/4076 (2013.01); H03K 19/20 (2013.01); H03L 7/0812 (2013.01); G11C 11/4074 (2013.01); G11C 11/4087 (2013.01);
Abstract

An electronic device including: a variable delay circuit configured to adjust a delay of a variable delay input for generating an output signal; a decision circuit coupled to the variable delay, the decision circuit configured to: generate a start signal for the variable delay circuit to begin measuring a coarse delay, generate a stop signal for the variable delay circuit to stop measuring the coarse delay, and generate an inversion-decision signal based at least in part on measuring the coarse delay; and an input selection circuit coupled to the variable delay circuit and the decision circuit, the input selection circuit configured to control a phase for a clock input based on the inversion-decision signal in generating the variable delay input.


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