The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 14, 2020

Filed:

Feb. 05, 2018
Applicant:

Xilinx, Inc., San Jose, CA (US);

Inventors:

Hao Yu, Broomfield, CO (US);

Raymond Kong, San Jose, CA (US);

Brian Martin, Longmont, CO (US);

Jun Liu, San Jose, CA (US);

Kevin Beazley, Seattle, WA (US);

Assignee:

XILINX, INC., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01);
U.S. Cl.
CPC ...
G06F 17/5054 (2013.01); G06F 17/5072 (2013.01);
Abstract

Providing dynamic platform support for a programmable integrated circuit (IC) can include loading a circuit design for a programmable IC, wherein the circuit design specifies a link region coupled to a first infrastructure region by first connections, and a kernel region coupled to the first infrastructure region by second connections and generating a base platform from the circuit design by removing the first infrastructure region, the kernel region, and the second connections from the circuit design and adding a wrapper that includes the first connections. A new platform can be generated from the base platform where the new platform includes the link region and, within the wrapper, a second infrastructure region coupled to the link region by the first connections.


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