The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 14, 2020

Filed:

Dec. 22, 2014
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Jonathan M. Eastep, Portland, OR (US);

Richard J. Greco, West Linn, OR (US);

Federico Ardanaz, Hillsboro, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 1/324 (2019.01); G06F 1/3234 (2019.01); G06F 1/3296 (2019.01);
U.S. Cl.
CPC ...
G06F 1/324 (2013.01); G06F 1/3243 (2013.01); G06F 1/3296 (2013.01); Y02D 10/126 (2018.01); Y02D 10/152 (2018.01); Y02D 10/172 (2018.01);
Abstract

Methods and apparatus to provide a hybrid power management approach are described. Some embodiments redefine the interface to Power Control Unit (PCU) allowing a hybrid implementation where software running on CPU (Central Processing Unit, also referred to herein interchangeably as 'processor') cores performs more of the work for power management, enabling the PCU to remain as a simple or regular microcontroller. Other embodiments are also disclosed and claimed.


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