The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 07, 2020

Filed:

Dec. 11, 2018
Applicant:

Northrop Grumman Systems Corporation, Falls Church, VA (US);

Inventors:

Leonard George Chorosinski, Ellicott City, MD (US);

Parrish E. Ralston, Baltimore, MD (US);

Venkatesh V. Sundaram, Johns Creek, GA (US);

Assignee:

NORTHROP GRUMMAN SYSTEMS CORPORATION, Falls Church, VA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/56 (2006.01); H01L 23/544 (2006.01); H01L 21/683 (2006.01); H01L 21/304 (2006.01); H01L 21/78 (2006.01); H01L 21/66 (2006.01); H01L 21/48 (2006.01);
U.S. Cl.
CPC ...
H01L 21/568 (2013.01); H01L 21/304 (2013.01); H01L 21/4825 (2013.01); H01L 21/561 (2013.01); H01L 21/6836 (2013.01); H01L 21/78 (2013.01); H01L 22/12 (2013.01); H01L 23/544 (2013.01); H01L 2221/68336 (2013.01); H01L 2221/68381 (2013.01); H01L 2223/5446 (2013.01);
Abstract

A method of encapsulating integrated circuits is disclosed. The method includes placing a front side of a semiconductor wafer, having partially cut scribe lines that separate a plurality of semiconductor dies, onto a backside of a dicing tape, grinding a backside of the cut semiconductor wafer to singulate the plurality of semiconductor dies, exposing the backside of the dicing tape to ultraviolet (UV) light to soften the dicing tape between each of the plurality of semiconductor dies and stretching the dicing tape to increase a distance between the plurality of semiconductor dies, laminating a backside and sides of each of the plurality of semiconductor dies with a first layer of encapsulant material, exposing a front side of the dicing tape to UV light to release the dicing tape from the plurality of semiconductor dies, and laminating a front side of the semiconductor dies with a second layer of encapsulant material.


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